In the fabrication of semiconductor integrated circuit (IC) devices, the quality or reliability of devices formed on the wafer must be verified before the wafer is packaged. The tests performed before such packaging step is normally called wafer-level reliability tests. The benefits of performing wafer-level reliability tests are several, for instance, it can maximize in-situ reliability controls to essentially replace product reliability control, and it can provide test results that can be used for fast process feedback, for malfunction or abnormality identification, and for product pass/fail classification.
The wafer-level reliability tests are frequently performed in a test machine in combination with a wafer prober. The wafer prober carries a wafer on a stage and, through an indexing system, moves the stage three dimensionally such that various dies situated on the wafer can be tested individually. In a typical wafer-level reliability test, the data obtained can be used to study the device characteristics for process feedback and to classify dies (or chips) for various degrees of quality or reliability for the purpose of product sorting. Major categories of wafer-level reliability tests include parametric tests for testing the device parameters, gross problem tests such as electrical continuity for detecting open or short circuits, leakage mechanism tests for device component such as diodes or transistors, for device isolation and for chip-level leakage in operating and standby modes, and various chip functionality tests such as, for a memory device, the functions of pause distribution, device timings, tests patterns, and reliability in the form of voltage stress.
Wafer-level reliability tests are normally conducted at a test temperature higher than room temperatures, for instance, between 70.degree. C. and 100.degree. C. or at cold temperatures. The test temperature range is determined by the typical packaged product performance requirement which is in the range between -65.degree. C. to 150.degree. C. In common practice, the wafer-level reliability tests are conducted at higher temperatures which are deemed as sufficient since device performance is generally worse at higher temperatures.
In a typical wafer prober equipped with a microscope observation device, such as that supplied by Electroglas Horizon.RTM. 4080X, the wafer inspection process can be carried out by the following process flow. First, a wafer is loaded to a fixative tray by the transfer arm of the prober. The wafer is then picked up by a vacuum pick up device, e.g., a vacuum pan, from the fixative tray and placed into a cassette slot. The cassette is then loaded onto an autoloader manually by a machine operator. The autoloader then transfers the wafer to a microscope stage by a transfer arm.
Concurrently, when the first wafer is being probed or tested, the transfer arm removes the second wafer out of the cassette and transports it to the prealigner. After the prealigning is performed, the transfer arm moves the wafer to a quickloader After the first wafer is completely probed, the transfer arm then removes it from the chucktop and returns it to the cassette. The second wafer is then transported from the quickloader to the chucktop and the probing process is repeated until all wafers in the cassette are probed. Alternatively, only a selected number, i.e., the first, the fifth, the tenth wafer, etc., needs to be tested in order to achieve a more realistic testing period.
In the above test process flow description, it is obvious that the wafer is moved numerous times by the transfer arm and the vacuum pick up device from station to station. During such movements, the wafer is completely unprotected and therefore subjected to numerous potential hazards. For instance, if the vacuum breaks in the vacuum pen, the wafer may drop and suffer a serious breaking or cracking problem. Furthermore, when the wafer is not properly positioned in the cassette, the wafer may fall out during an autoloading process or when later picked up by the transfer arm and then dropped or scratched. The occurrence of any of these problems can lead to serious defects or the complete destruction of the wafer and thus a serious reliability problem and decrease in the yield of the fabrication process.
It is therefore an object of the present invention to provide a method for loading a wafer into a microscope that does not have the drawbacks or shortcomings of the conventional method.
It is another object of the present invention to provide a method for loading a wafer into a microscope that has the wafer protected without risking potential damages to the wafer by making mechanical contacts with the wafer.
It is a further object of the present invention to provide a method for loading a wafer into a microscope that utilizes a removable wafer mounting tray such that a wafer can be securely positioned and protected by the mounting tray during transit in and out of the test machine.
It is another further object of the present invention to provide a method for loading a wafer into a microscope which utilizes a removable wafer mounting tray generally of a disc shape and has a hollow center portion.
It is still another object of the present invention to provide a method for loading a wafer into a microscope by utilizing a removable wafer mounting tray that has a recess in its top surface adapted for receiving a wafer.
It is yet another object of the present invention to provide a method for loading a wafer into a microscope by utilizing a removable wafer mounting tray equipped with a handle extending outwardly from the tray such that it can be gripped by a machine arm or by a human hand.
It is still another further object of the present invention to provide a method for loading a wafer into a microscope by utilizing a removable wafer mounting tray wherein the tray is generally of a circular shape having a hollow center portion.
It is yet another further object of the present invention to provide an apparatus for loading a wafer into a microscope in the form of a removable wafer mounting tray capable of protecting a wafer during transit in and out of a test machine.